Our CEO and CTO, Andrew Canis and Jongsok Choi, gave a talk at the monthly FPGA seminar at the University of Toronto last week. We started with an overview of LegUp Computing and how FPGAs compare to CPUs. We talked about how our LegUp high-level synthesis software tool makes FPGA design easier by allowing a C/C++ input language even for system-level design. We showed off some surprising results we found for floating point cores generated with LegUp HLS compared to hand-written RTL cores. Then we showed a demo of our Memcached F1 instance using cloud FPGAs on AWS, and we gave some highlights on what it’s like to working at a startup.
We’re happy to announce a new member of the team, Mehul Gupta, who has just joined the company for an internship from the University of Waterloo. He has been helping to build a floating-point library written in C++ using LegUp HLS that offers user-configurable precision (single, double, half, and arbitrary precision). The first example is a floating-point multiplier available in our public git repository:
Generic floating-point support for all FPGA vendors. We no longer rely on vendor-provided floating point cores. The floating-point cores can be tuned to the target FPGA architecture for optimal performance and area results. Our HLS floating-point cores are shown to produce better results than hand-written floating-point IP cores.
Standard IP-XACT packaging file generation for LegUp cores to support integration into vendor system builder tools
CentOS 6+ support, LegUp Linux installer no longer requires root privileges
VHDL top-level wrapper generation to support integration into VHDL projects
Various bug fixes
LegUp 6.6 comes with a 30-day free trial period so that you can try out the tool. Please note that during the trial period, you may only use LegUp for evaluation purposes, and the generated hardware cannot be used in a commercial product. To purchase a full license, please contact us at email@example.com.