LegUp 7.0 Release

By Ruolong Lian,

We are excited to announce that LegUp 7.0 has been released! You can download LegUp here.

Release Notes

New features, enhancements and bug fixes for this release:

  • Extended support for versatile C++ software testbench that can be used for Hardware/Software co-simulation.
  • Improved HLS compilation run-time especially for large input programs.
  • Various QoR enhancements for pipelined circuits:
    • Register usage reduction via intelligent use of MLAB/SLICEM, especially for deep pipelines.
    • Control logic optimization that leads to better initiation interval (II), Fmax, and area.
    • Fmax improvement for circuits with large initiation interval (II).
  • Enhanced strength reduction for integer multiplications.
  • Reduced RAM usage for different FPGA vendors.
  • Various bug fixes.

Pricing

LegUp 7.0 comes with a 30-day free trial period so that you can try out the tool. Please note that during the trial period, you may only use LegUp for evaluation purposes, and the generated hardware cannot be used in a commercial product. To purchase a full license, please contact us at sales@legupcomputing.com.

Download

You can download LegUp here.

University of Toronto True Blue Expo

By Andrew Canis,

Thanks to everyone who came by and visited out booth at MaRS for the University of Toronto startup showcase! We really enjoyed talking about how LegUp Computing’s technology makes FPGAs much easier to program. I was amazed at how many startups are being spun out of the University of Toronto. We appreciate the support from the UTEST incubator and University of Toronto as we grow the company.

Blue Expo Booth

LegUp 6.7 Release

By Ruolong Lian,

We are excited to announce that LegUp 6.7 has been released! You can download LegUp here.

Release Notes

New features and bug fixes for this release:

  • Automatic loop nest merge (loop coalescing) to reduce loop nest overhead and enhance loop pipeline throughput.
  • Improved support of the floating-point multiply-accumulate mode of Intel’s hard floating-point DSP core.
  • Improved optimization for bit-level operations.
  • Added legup_reg() primitive function (template <typename T> T legup_reg(T in);) to allow explicit register insertion.
  • Support write strobe signal (WSTRB) in the auto-generated AXI4 slave interface.
  • Up to 14x faster HW/SW Co-simulation of AXI4 slave interface.
  • Support for Microsemi Libero 12.0.
  • Various bug fixes

Pricing

LegUp 6.7 comes with a 30-day free trial period so that you can try out the tool. Please note that during the trial period, you may only use LegUp for evaluation purposes, and the generated hardware cannot be used in a commercial product. To purchase a full license, please contact us at sales@legupcomputing.com.

Download

You can download LegUp here.