New features, enhancements and bug fixes for this release:
- Extended support for versatile C++ software testbench that can be used for Hardware/Software co-simulation.
- Improved HLS compilation run-time especially for large input programs.
- Various QoR enhancements for pipelined circuits:
- Register usage reduction via intelligent use of MLAB/SLICEM, especially for deep pipelines.
- Control logic optimization that leads to better initiation interval (II), Fmax, and area.
- Fmax improvement for circuits with large initiation interval (II).
- Enhanced strength reduction for integer multiplications.
- Reduced RAM usage for different FPGA vendors.
- Various bug fixes.
LegUp 7.0 comes with a 30-day free trial period so that you can try out the tool. Please note that during the trial period, you may only use LegUp for evaluation purposes, and the generated hardware cannot be used in a commercial product. To purchase a full license, please contact us at firstname.lastname@example.org.