New features and bug fixes for this release:
- Automatic loop nest merge (loop coalescing) to reduce loop nest overhead and enhance loop pipeline throughput.
- Improved support of the floating-point multiply-accumulate mode of Intel’s hard floating-point DSP core.
- Improved optimization for bit-level operations.
- Added legup_reg() primitive function (
template <typename T> T legup_reg(T in);) to allow explicit register insertion.
- Support write strobe signal (WSTRB) in the auto-generated AXI4 slave interface.
- Up to 14x faster HW/SW Co-simulation of AXI4 slave interface.
- Support for Microsemi Libero 12.0.
- Various bug fixes
LegUp 6.7 comes with a 30-day free trial period so that you can try out the tool. Please note that during the trial period, you may only use LegUp for evaluation purposes, and the generated hardware cannot be used in a commercial product. To purchase a full license, please contact us at email@example.com.