We will be showcasing LegUp’s industry leading high-level synthesis software and talking about the next generation of our tools. We will also have live computer vision demonstrations designed with LegUp HLS and targeting various FPGA devices.
New features, enhancements and bug fixes for this release:
AXI slave interface now supports concurrent access while the accelerator is running.
Added a “stable” argument interface type of which LegUp will assume the signal is stable and remove unnecessary registers.
Improved timing constraint adjustment for achieving a better pipeline initiation interval (II).
Added support to convert global memory accesses to registers when it’s safe. This helps relaxing the resource constraint of BRAM ports to achieve better II.
Sped up pipeline scheduler especially for large pipelines.
LegUp 7.1 comes with a 30-day free trial period so that you can try out the tool. Please note that during the trial period, you may only use LegUp for evaluation purposes, and the generated hardware cannot be used in a commercial product. To purchase a full license, please contact us at email@example.com.