New features and enhancements for this release:
- LegUp now supports Achronix’s new 7nm Speedster7t FPGA. LegUp is ready for production use for Achronix FPGAs
- Beta support for processor-accelerator hybrid flow for Microchip’s PolarFireSoC FPGA. LegUp can now generate a RISC-V SoC with LegUp accelerator for PolarFireSoC.
- Full floating-point support for all vendors (Intel, Xilinx, Microchip, Achronix, and Lattice)
- Complete support for arbitrary bit-width integer/fixed-point libraries for all vendors
- DSP tech mapping to generate optimized hardware for target FPGA
- Line buffer library for image processing (documentation)
- Reduced LegUp compile time for pipelining by up to 80%
- Various QoR improvements and bug fixes
LegUp 8.0 comes with a 30-day free trial period so that you can try out the tool. Please note that during the trial period, you may only use LegUp for evaluation purposes, and the generated hardware cannot be used in a commercial product. To purchase a full license, please contact us at firstname.lastname@example.org.