We have fixed reported bugs from the LegUp 6.1 release from August, thanks for your feedback! We have also continued to add new features to this release of LegUp.
New features and bug fixes for this release:
- Support for Intel Arria 10 hard floating point operations.
- SW/HW Co-simulation now works with floating point operations.
- Preliminary support for an AXI slave interface used to control a LegUp accelerator.
- Support for integrating a user-defined Verilog module into a LegUp design
- Improved support for C++ classes and structs.
- Improved memory partitioning.
LegUp 6.2 comes with a 30-day free trial period so that you can try out the tool. Please note that during the trial period, you may only use LegUp for evaluation purposes, and the generated hardware cannot be used in a commercial product. To purchase a full license, please contact us at firstname.lastname@example.org.
You can download LegUp here.
We are pleased to present the world’s fastest cloud-hosted Memcached on AWS using EC2 F1 (FPGA) instances. With a single F1 instance, LegUp’s Memcached server prototype achieves over 11M ops/sec, a 9X improvement over ElastiCache, at <300 μs latency. It offers 10X better throughput/$ and up to 9X lower latency compared to ElastiCache. Please refer to our 1-page handout for more details.
If you would like a demo of the Memcached server, please contact us at email@example.com.
We are pleased to announce that LegUp 5.1 has been released!
This release is a culmination of more than 25 man-years of research and development. Prior to this release, LegUp has had 4 major releases for academic research. During these years, LegUp has been used by thousands of researchers around the world, making it the de-facto standard in high-level synthesis (HLS) research. In 2014, LegUp won the Community Award at the International Conference on Field Programmable Logic (FPL) for contributions to HLS research. LegUp has also been shown to produce state-of-the-art hardware.
We have brought all of the best features from our previous releases, and made it even better by adding new features, as well as improving the quality of the generated hardware.
Here are just some of the highlights of what we have added for this release.
- LegUp IDE which provides a complete development environment with a debugger and a profiler.
- Support for Xilinx, Lattice, Microsemi, and Achronix FPGAs (LegUp previously only supported Altera FPGAs).
- Windows OS support (LegUp previously only supported Linux OS).
- Improved pipelining.
- Improved memory architecture.
- Improved user messages.
LegUp 5.1 comes with a 30-day free trial period so that you can freely try out the tool. Please note that during the trial period, you may only use LegUp for evaluation purposes only, and the generated hardware cannot be used in a product. To purchase a full license, please contact us at firstname.lastname@example.org.